Kepco KLR Series Developers Guide Manual do Utilizador descarregar pdf (Página 15)

KLR-DEV 060713 1-5

For example, if an overvoltage error is detected, bit 0 of the Questionable Status Condition reg-

ister is set. The 0 to 1 transition causes bit 0 to be stored as a 1 in the corresponding Event reg-

ister. If bit 0 of the Questionable Status Enable register has bit 0 set, bit 3 of the Status Byte

(STB) register is asserted. If bit 3 of the Service Request Enable (SRE) register is also set to 1,

then bit 6 of the STB is set to 1 (true), causing the power supply to assert the SRQ line to the

host computer.

FIGURE 1-1. STATUS REPORTING STRUCTURE

1 2 ... 10 11 12 13 14 15 16 17 18 19 20 ... 127 128

KEPCO® 1
DEVELOPER’S GUIDE 1
TABLE OF CONTENTS 3
LIST OF FIGURES 8
LIST OF TABLES 9
SECTION 1 - INTRODUCTION 11
KLR-DEV 060713 12
INTERFACE 12
KLR-DEV 060713 1-3 13
KLR-DEV 060713 1-5 15
KLR-DEV 060713 1-7 17
SECTION 2 - COMMUNICATION 19
KLR-DEV 060713 2-3 21
SECTION 3 - IVI-COM DRIVER 23
KLR-DEV 060713 3-3 25
KLR-DEV 060713 3-5 27
3-6 KLR-DEV 060713 28
WRITTEN IN C++ (SHEET 2 OF 2) 29
3-10 KLR-DEV 060713 32
KLR-DEV 060713 3-11 33
KLR-DEV 060713 3-13 35
3-14 KLR-DEV 060713 36
36
SECTION 4 - LABVIEW G DRIVER 43
4-2 KLR-DEV 060713 44
KLR-DEV 060713 4-3 45
KLR-DEV 060713 4-5 47
VI BLOCK DIAGRAM 48
KLR-DEV 060713 4-7 49
KLR-DEV 060713 4-9 51
KLR-DEV 060713 4-11 53
KLR-DEV 060713 4-13 55
KLR-DEV 060713 4-15 57
4-16 KLR-DEV 060713 58
FIGURE 4-12 59
FIGURE 4-13. FUNCTION G 61
BLOCK DIAGR 61
KLR-DEV 060713 5-1 63
5-2 KLR-DEV 060713 64
KLR-DEV 060713 5-3 65
5-4 KLR-DEV 060713 66
KLR-DEV 060713 5-5 67
5-6 KLR-DEV 060713 68
KLR-DEV 060713 5-7 69
5-8 KLR-DEV 060713 70
KLR-DEV 060713 5-9 71
FIGURE 5-8. TRIGGER WINDOW 73
KLR-DEV 060713 5-13 75
KLR-DEV 060713 6-1 77
KLR-DEV 060713 6-3 79
KLR-DEV 060713 6-5 81
KLR-DEV 060713 6-7 83
6-9/(6-10 Blank) 85
KLR-DEV 060713 7-1 87
PIN SIGNAL NAME FUNCTION 87
7-2 KLR-DEV 060713 88
7-3/(7-4 Blank) 89
KLR-DEV 060713 8-1 91
KLR-DEV 060713 8-3 93
COMMAND PAR. COMMAND PAR 97
A-2 KLR-DEV 060713 98
KLR-DEV 060713 A-3 99
A-4 KLR-DEV 060713 100
KLR-DEV 060713 A-5 101
B.1 INTRODUCTION 103
DISP:TEXT? 104
INIT[:IMM] 104
INIT:CONT 105
KLR-DEV 060713 106
LIST:CURR 107
B-6 KLR-DEV 060713 108
LIST:VOLT:POIN? 109
MEAS:CURR? 109
MEAS:VOLT? 109
MEM:LOC? 109
B-8 KLR-DEV 060713 110
CURR:LIM:HIGH 111
CURR:LIM:HIGH? 112
CURR:MODE 112
CURR:MODE? 112
CURR:PROT 113
B-12 KLR-DEV 060713 114
FUNC:MODE 114
FUNC:MODE? 114
VOLT:LIM:HIGH 115
VOLT:LIM:HIGH? 115
VOLT:MODE 116
VOLT:MODE? 116
VOLT:PROT 116
VOLT:PROT? 116
VOLT:TRIG 117
VOLT:TRIG? 117
STAT:OPER:COND? 118
STAT:OPER:ENAB 118
STAT:OPER:ENAB? 118
STAT:OPER? 118
STAT:PRES 118
STAT:QUES? 119
KLR-DEV 060713 B-19 121
SYST:COMM:SER:PROM 123
SYST:ERR? 124
SYST:ERR:CODE? 124
SYST:ERR:CODE:ALL? 124
SYST:KLOC 124
SYST:KLOC? 125
SYST:LANG 125
SYST:LANG? 125
SYST:SET? 127
SYST:VERS? 127
TRIG:SOUR 127
TRIG:SOUR? 127
B-26 KLR-DEV 060713 128

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